A critical consideration in the design of fast computer systems is the time required to perform data transfer operations. Data transfers usually involve transfers between memory and the CPU, but can also involve transfers between the CPU and a peripheral device, as well as transfers directly between memory and peripheral devices (i.e., direct memory access), and between CPUs.
One of the delays that occurs during a data transfer is in the bus receiver that interfaces the CPU, memory or peripheral device to the bus architecture. One function of the bus receiver is to detect transitions of data signals appearing on the bus. In synchronous systems, this usually involves detecting the state of the data signal at the time of a transition of a clock signal from one state to another. It will be appreciated that the time required to detect the state of the data signal upon a clock transition can impose serious limitations on overall system speed.
The aforementioned delay problem is exacerbated if the computer system employs a low voltage swing bus design. Some new generations of fast computer systems employ resistor pullup bus designs wherein the bus is biased at a predetermined voltage level, and the states of the data signal vary about a reference voltage that is derived from the bias voltage. Variations of the data signal about the bias voltage can be as low as 400 millivolts (i.e., +/-200 millivolts about the bias voltage). Reliable detection of low voltage swings can be difficult, particularly if the environment is electrically noisy. Thus, the bus receiver must not only be fast, but it must also be capable of accurately and reliably detecting low voltage swings in noisy environments.
Many of the known bus receiver designs are incapable of detecting transitions of low voltage data signals, particularly in high noise environments. Moreover, known bus receiver designs often have long setup and hold times, and thus result in high memory latency and poor overall system performance. Since, generally speaking, noise increases required setup and hold times (in addition to decreasing the reliability of detected data), the existence of noise slows down the bus receiver even further.
It is therefore desirable to provide a bus receiver that is capable of detecting transitions of low voltage data signals, particularly in noisy environments, and that is also fast, but yet simple, reliable and inexpensive to implement. The present invention achieves these goals.